CHM3301PAPT -28 c h e n m k o e n t e r p r i s e c o . , l t d s u r f a c e m o u n t p-channel enhancement mode field effect transistor v o l t a g e 3 0 v o l t s c u r r e n t 28 ampere a p p l i c a t i o n f e a t u r e * super high density cell design for extremely low r ds(on) . construction * p-channel enhancement * s e r v o m o t o r c o n t r o l . * p o w e r m o s f e t g a t e d r i v e r s . * o t h e r s w i t c h i n g a p p l i c a t i o n s . c/w 2007-06 (note 3) * high power and current handing capability. note : 1. surface mounted on fr4 board , t <=10sec 2. pulse test , pulse width <= 300us , duty cycle <= 2% c i r c u i t a b s o l u t e m a x i m u m r a t i n g s t a = 2 5 c u n l e s s o t h e r w i s e n o t e d s y m b o l parameter CHM3301PAPT units v dss drain-source voltage -30 v s d g 2 v 1 gss 3 gate-source voltage -100 20 v i d * small flat package. ( to-252a ) maximum drain current - continuous t j a - pulsed operating temperature range p -55 to 150 d c maximum 3. repetitive rating , pulse width linited by maximum junction temperature power dissipation (note 1) 42 4. guaranteed by design , not subject to production trsting w t to-252a stg to-252a storage temperature range dimensions in inches and (millimeters) -55 to 150 c thermal characteristics .220 (5.59) r .195 (4.95) q .417 (10.6) ja .346 (8.80) thermal resistance, junction-to-ambient 1 gate 3 drain( heat sink ) 2 source 50 .28 0 (7.10) .238 (6.05) .261 (6.63) .213 (5.40) .035 (0.90) .025 (0.64) .102 (2.59 ) .078 (1.98) .094 (2.40) .087 (2.20) .035 (0.89) .018 (0.45) .024 (0.61) .016 (0.40) (3) (2) (1)
rating characteristic curves ( CHM3301PAPT ) e l e c t r i c a l c h a r a c t e r i s t i c s t a = 2 5 c u n l e s s o t h e r w i s e n o t e d s y m b o l p a r a m e t e r c o n d i t i o n s m i n t y p m a x u n i t s -1 o f f c h a r a c t e r i s t i c s b v d s s drain-source breakdown voltage 32 v o n c h a r a c t e r i s t i c s gs g = 0 v, i d fs forward transconductance v = -250 a ds n a -30 = -10v v n a , i i d gssf dss = -5.3a s zero gate voltage drain current i r v ds(on) ds static drain-source on-resistance gate-body leakage m w = vgs=-10v, id=-5.3a gate-body leakage -30 v, v v gs gs = 20v, = 0 v v ds = 0 v switching a characteristics +100 -100 v gs = -20v, v q gs ds gate-source charge = 0 v q gd gate-drain charge t on 50 turn-on time v ns gs v (th) dd gate threshold voltage = -15v v i ds d = -1.0a = v , gs v , i g d s = -10 v = -250 a 32 t r rise time 18 -1 v vgs=-4.5v, id=-2a 122 t f fall time 50 q g total gate charge 3 vds=-15v, id=-5.3a vgs=-10v turn-off time t off rgen= 6 w (note 2) (note 4) -3 10 s nc 16 9 61 22 drain-source diode characteristics and maximum ratings gssr i v sd drain-source diode forward current drain-source diode forward voltage i s = -2.3a , v g s = 0 v -28 -1.2 a v (note 1) (note 2) i 26 38 19.6 26 4.5 dynamic characteristics input capacitance reverse transfer capacitance output capacitance c iss c oss c rss v ds = -15v, v gs = 0v, f = 1.0 mhz 1165 265 165 pf
r a t i n g c h a r a c t e r i s t i c c u r v e s ( CHM3301PAPT ) t y p i c a l e l e c t r i c a l c h a r a c t e r i s t i c s 0 1.0 2.0 0 6 12 30 3.0 18 24 -v , drain-to-source voltage (v) i , dr a in current (a) ds d figure 1. output characteristics v gs= - 10,-8,-6v v gs= - 3.0v 50 0 -i , dr a in current (a) d 0 10 20 -vgs , gate-to-source voltage (v) figure 2. transfer characteristics j=25c t j=125c t j=-55c t 1.0 2.0 5.0 30 40 10 0 5 10 15 20 0 2 4 6 8 qg , total gate charge (nc) vgs , gate to source voltage (v) figure 3. gate charge id=-5.3a vds=-15v 2.2 0.7 -100 1.0 1.6 t , jun ctio n t emperature (c) j 0.4 1.3 1.9 d r a i n - s o u r c e o n - r e s i s t a n c e r , no r m a l i z e d d s ( o n ) figure 4. on-resistance variation with temperature id=-5.3a vgs=-10v -50 0 50 100 150 200 temperature 1.3 0.7 -50 -25 0 25 50 75 100 125 150 0.9 1.1 t , jun ctio n t emperature (c) j 0.6 0.8 1.0 1.2 threshold voltage vth , normalized gate-source figure 5. gate threshold variation with id=250ua vds=vgs 6.0 3.0 4.0 v gs= - 4.0v
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